The present invention relates to a clock signal generator that generates a clock signal, based on an oscillation signal outputted from a crystal oscillator.
When a clock signal is generated based on an oscillation signal produced from a crystal oscillator, a given period of time is normally required until the clock signal is stably outputted. There is a demand that since a clock signal is generally used as a signal for providing timing when a computer is operated, it is desired to output it stably as early as possible. An oscillation control circuit which includes a crystal oscillator circuit for generating a clock signal, based on the oscillation of a crystal oscillator and a self-oscillator for generating another clock signal and which supplies the clock signal generated from the self-oscillator to a CPU during a period taken until the clock signal produced from the crystal oscillator circuit is outputted stably, and supplies the clock signal to the crystal oscillator, has been disclosed in, for example, a patent document 1 (Japanese Unexamined Patent Publication No. Hei 9(1997)-93040). According to the oscillation control circuit, it is possible to shorten a period taken until the oscillation of the crystal oscillator is accessed by the above operation and the oscillating operation of the crystal oscillator circuit becomes stable. The oscillation control circuit has means for counting pulses of the clock signal produced from the self-oscillator. When a count value obtained by the corresponding count has reached a predetermined maximum count value, the source for the supply of the clock signal to the CPU is switched from the self-oscillator to the crystal oscillator circuit. It is thus possible to decrease the probability that a program malfunction will occur due to the runaway of the CPU.
While there is a demand that it is desired to output the clock signal stably as early as possible, a reduction in current consumption at a clock signal generator is also desired. Since the amplitude of the clock signal is generally decreased when current consumption for generating the clock signal is reduced, the stop of the clock signal and a so-called “clock omission” that part of a train of clock pulses comprising a repetition of high and low levels is not outputted, occur. The oscillation control circuit of the patent document 1 is one configured assuming that all clocks of the clock signal can be counted normally. A problem arises in that when the stop of the clock signal and the clock omission take place, the operation of switching the source for the supply of the clock signal to the CPU from the self-oscillator to the crystal oscillator circuit cannot be performed normally, thus causing a device's malfunction.